All currently used data-transmission systems are synchronized in phase and symbol rate in some manner. Start-stop synchronization has already been discussed. All fully synchronous transmission systems have timing generators or clocks to maintain stability. The transmitting device and its companion receiver at the far end of the circuit must maintain a timing system. In normal practice, the transmitter is the master clock of the system. The receiver also has a clock that in every case is corrected by some means to its transmitter's master clock equivalent at the far end.

Another important timing factor is the time it takes a signal to travel from the transmitter to the receiver. This is called propagation time. With velocities of propagation as low as 20,000 mi/sec, consider a circuit 200 mi in length. The propagation time would then be 200/20,000 sec or 10 msec. Ten milliseconds is the time duration of 1 bit at a data rate of 100 bps; thus the receiver in this case must delay its clock by 10 msec to be in step with its incoming signal. Temperature and other variations in the medium may also affect this delay, as well as variations in the transmitter master clock.

There are basically three methods of overcoming these problems. One is to provide a separate synchronizing circuit to slave the receiver to the transmitter's master clock. However, this wastes bandwidth by expending a voice channel or subcarrier just for timing. A second method, which was quite widely used until twenty years ago, was to add a special synchronizing pulse for groupings of information pulses, usually for each character. This method was similar to start-stop synchronization, and lost its appeal largely because of the wasted information capacity for synchronizing. The most prevalent system in use today is one that uses transition timing, where the receiving device is automatically adjusted to the signaling rate of the transmitter by sampling the transitions of the incoming pulses. This type of timing offers may advantages, particularly automatic compensation for variations in propagation time. With this type of synchronization the receiver determines the average repetition rate and phase of the incoming signal transition and adjusts its own clock accordingly by means of a phase-locked loop.

In digital transmission the concept of a transition is very important. The transition is what really carries the information. In binary systems the space-to-mark and mark-to-space transitions (or lack of transitions) placed in a time reference contain the information. In sophisticated systems, decision circuits regenerate and retime the pulses on the occurrence of a transition. Unlike decision circuits, timing circuits that reshape a pulse when a transition takes place must have a memory in case a long series of marks or spaces is received. Although such periods have no transitions, they carry meaningful information. Likewise, the memory must maintain timing for reasonable periods in case of circuit outage. Note that synchronism pertains to both frequency and phase and that the usual error in high-stability systems is a phase error (i.e., the leading edges of the received pulses are slightly advanced or retarded from the equivalent clock pulses of the receiving device). Once synchronized, high-stability systems need only a small amount of correction in timing (phase). Modem internal timing systems may have a long-term stability of 1 x 10-8 or better at both the transmitter and receiver. At 2400 bps, before a significant timing error can build up, the accumulated time difference between transmitter and receiver must exceed approximately 2 x 10-4 sec. Whenever the circuit of a synchronized transmitter and receiver is shut down, their clocks must differ by at least 2 x 10-4 sec before significant errors take place once the clocks start back up again. This means that the leading edge of the receiver-clock equivalent timing pulse is 2 x 10-4 in advance or retarded from the leading edge of the pulse received from the distant end. Often an idling signal is sent on synchronous data circuits during periods of no traffic to maintain the timing. Some high-stability systems need resynchronization only once a day.

Note that thus far in our discussion we have considered dedicated data circuits only. With switched (dial-up) synchronous circuits, the following problems exist:

• No two master clocks are in perfect phase synchronization.

• The propagation time on any two paths may not be the same.

Thus such circuits will need a time interval for synchronization for each call setup before traffic can be passed.

To summarize, synchronous data systems use high-stability clocks, and the clock at the receiving device is undergoing constant but minuscule corrections to maintain an in-step condition with the received pulse train from the distant transmitter, which is accomplished by responding to mark-to-space and space-to-mark transitions. The important considerations of digital network timing were also discussed in Chapter 6.

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