(iii) Implementation advantage. The factors to be considered for switching design and implementation are traffic loads, modularity, testability, expandability and simple control requirements. For large switches with heavy traffic loads, the TST have good implementation advantage.
(iv) More cost effective. If the input channel loading is high, the time expansion of TST and space expansion of STS are required. Time expansion of TST can be achieved at less cost than space expansion of STS.
In comparison with STS, the TST have certain limitations. For small switches, the STS architectures are less complex to implement than TST. The control requirements of STS is simpler than TST.
The principle of operation of TST switching is shown in Fig. 5.24. In figure, two flows of time slots, one for each direction are connected together.
The functional block diagram which explains the transfer of signals from inlet to outlet is shown in Fig. 5.25. The information arriving at the incoming link of TDM channel is delayed in the inlet times stage until an appropriate path through the space stage is available. Then the information is transferred through the space stage to the appropriate outlet time stage. Here the information is held until the desired outgoing time slot occurs. Any space stage time slot can be used to establish a connection. The space stage operates in a time divided fashion, independently of the external TDM links. There are many alternative paths between a prescribed input and output unlike a two stage network which has only one fixed path.
Fig. 5.25. TST switching structure.
Blocking probability. The blocking probability is minimised if the number of space stage time slots L is made to be large. By direct analogy of three stage space switches, the TST switch is strictly non-blocking if
where T = number of time slot of time switch.
L = number of space slot of space switch.
The probability graph of TST switch with non-blocking stage is shown in Fig, 5.26.
The general expression of blocking probability for a TST switch with non-blocking individual stage is
Implementation complexity. The implementation complexity (IC) of a TST switch can be derived as
NL log2 N + 2NT (8) + 2NL log2 T IC = N2 +-—-1^^-^^ ...(5.40)
Example 5.4. Determine the implementation complexity of 2048 channel TST switch with 16 TDM links and 128 channels. Let the time slot of space switch is 25. Sol. Given N = 16 T = 128 L = 25
16 x 25 x log2 16 + 2 x 16 x 128 x 8 + 2 x 16 x 25 x log2 128
IC = 656 cross points.
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