The ATM switch should have enough capacity to store incoming calls and the routing table. It should have 16 to 32 input and output ports and supports all AAL (ATM Adaptation layer). It should acts as support for congestion control. The switch should support cell switching at a rate of atleast 1 million cells per sec. The ATM switch operation is given below by step by step procedure.
1. The switch examines the VPI/VCI of the incoming cell to determine the output port to which the cell should be forwarded.
2. The ATM switch modifies the VPI/VCI fields to new value for the output port.
3. The Header error control (HEC) is used for error detection and correction in the header field of each cell. If the HEC can not correct the error, the ATM switch will discard the cell.
4. The ATM switch can modify the routable table using its control unit.
Traffic congestion : An ATM switch involved with two types of blocking of traffic congestion. They are
1. Fabric blocking. It occurs when the fabric capacity of a switch is less than the sum of its input data rate. In this case the switch must drop some of the cells. Some ATM switches are limited to 16 or 32 OC-3 input ports.
2. Head of the line blocking. It occurs when an output port is congested and a cell is waiting in the input port. The switch must drop some of the cells in the output port. Some switches randomly discard the cells, and all stations must retransmitt all the cells.
ATM Switch Architecture. Fig. 11.28 shows the general architecture of an ATM switch. The ATM switch uses statistical packet multiplexing. SDM dynamically allocates bandwidth
to the active input channels, resulting in very efficient bandwidth utilization. In SDM, an idle channel does not receive any time allocation. SDM uses a store and forward mechanism in order to detect and correct error from incoming packets. SDM will not allocate a time slot to any idle input.
The control processor is used to control the input/output buffers and update the routing table of the switch. The switch must be capable of processing atleast one billion cells per second and supports atleast one million cells per second. The buffers are used to store the incoming data cell and the routing table.
ATM cell format. ATM uses VLSI technology to segment data to the cell at high speeds. Each cell consists of 53 bytes, in which there are a 5 byte header and a 48 byte payload. ATM cell format is shown in Fig. 11.29.
Fig. 11.29. ATM cell format.
The ATM protocol is not influenced by the actual configuration of the payload. The data is segmented into 48 bytes sizes and packaged into ATM cells. These cells can be multiplexed with other payload cells and transported through ATM routers and delivered to an end point network, where there are demultiplexed and reassembled into the original payload format and placed on to the end point network to be eventually routed to the user terminal or node. The fixed cell size ensures that time critical information such as voice or video is not adversely affected by long data frames or packets.
ATM Network Interface. Fig. 11.30 illustrates a typical ATM network. It consists of switches and end users with necessary interfaces.
ATM switches offer two types of interfaces. They are:
1. Switch to Switch Interface or Network to Network Interface (NNI). It is an interface between nodes within the network or between different sub network.
2. Switch to User Interface or User to Network Interface (UNI). UNI is the standard technical specification allowing ATM customer equipment (CEQ) from various manufacturers to communicate over a network provided by yet another manufacturer. It is the interface employed between ATM customer equipment and either ATM switch.
Another interface called ATM inter network interface (INI) used for intercommunication. It is also used for operational and administrative boundaries between interconnected networks. It is based upon NNI but include more features for ensuring security, control and proper administration of inter-carrier connections.
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