Conclusions

The design of submicron CMOS broadband LNAs is clarified using a case-study. Special attention is given to the nonlinearities that occur in deep-submicron CMOS transistors. The case study concludes by describing a measured prototype. It is described why and how the same mechanism that gives rise to the non-quasistatic effect is active and can be made visible at frequencies much below the cut-off frequency, suggesting the use of non-quasistatic models at these frequencies. A comparison...

Do

Voltage regulator with pulse-density control. In conclusion we can say that capacitive conversion has a limited efficiency when used with varying input voltages and varying loads, which makes it less suited for battery conversion applications. The basic circuit is shown in Fig. 13. Energy from the input source is stored in the coil Lx via switch S i and transferred to the output capacitor Cout via switch S2 or diode Dj. This converter can be used for up-conversion from a 1 V battery....

Technology Comparison

Table 5 is a comparison of several technologies used for making power amplifiers. Each can be made to work trading-off cost, performance, and volume (capacity delivery) according to customer requirements. Table 5. 3.4V Saturated Power Amplifiers for FM and GMSK Mod. Table 5. 3.4V Saturated Power Amplifiers for FM and GMSK Mod.

The Receiver Topology

The receiver is a balanced quadrature demodulator. In an input differential pair with emitter degeneration, the single ended LNA signal is converted to a balanced radio signal to drive the mixers over a capacitive coupling (See fig. 1, 2, 3). On the output collectors of the mixers external capacitors are connected to build a 300 kHz Low Pass RC first order filter suppressing the blocking levels at e.g. 3 MHz carrier distance. The +45 and the -45 Local Oscillator (LO) signals are derived from...

Mixedmode Topdown Design Methodology

The ideal design flow for a mixed analog digital ASIC is schematically shown in Fig. 2. It consists of four basic steps 4 1) system specification - First the functionality of the complete ASIC is to be described in some formal way independent of the way of implementation (the format could be a language description or something else). This system specification can then be verified with system-level simulations to check the functionality of the chip within its system context. This specification...

Imi ii ii

Figure 8 Layout showing (a) mirror symmetry and (b) common-centroid symmetry. To implement a fully differential circuit with high common-mode rejection, the layout must have the same parasitic coupling to each of the two differential paths. This may require either mirror symmetry or a common-centroid geometry for the layout 17 18 19 . Figure 8(a) illustrates mirror symmetry. The differential design has a center line about which one side of the differential path is a mirror image of the other....

Lili

MIDAS output spectrum for the oversampling converter with noise coupling through the input switches gate-to-source capacitances. The strong correlation between the simulated harmonic tones, shown in Figure 20, and those observed experimentally suggests that the coupling of supply noise through the input switch gate-to-source capacitance is the primary noise coupling mechanism. This example illustrates the difficulty in evaluating on-chip noise-cou-pling. Modeling substrate noise coupling is a...

YDD

B) Capacitor connected to base (and collector for bias purpose). Fig. 5 Two examples of LV BiCMOS log-domain integrators. Q2 and C are forming the log-domain integrator. Transistor Q3 is used as an adjustable level shifter and Q5 accomplishes the exponential expansion. Transistor Q4 and the current mirror MpM2 are needed for canceling the losses introduced by discharging the capacitor by a constant current. Note that the effect of the base currents can be reduced by inserting voltage followers...

Info

Where VCc is the supply voltage, Vsat is the saturation voltage of the active device, and VT is the so-called thermal voltage ( 25.9 mV at 300 K). Thus, even if Vsat 0, with a 1-Volt supply the maximum possible voltage gain is Av(max) 1 VT 38.6. Fig. la. Amplifier with Fig. lb. Amplifier with resistive load. active load. However, at RF frequencies one must consider the load impedance, rather than just the load resistance, and the effects of parasitic capacitance on the load can be severe. (The...

Modern GaAs Mesfet Process

Figure 18 is a summary of a modern ion implanted GaAs MESFET process used to make 3V power amplifiers. This technology has three Semi-Insulating GaAs E,D,G MESFET MIM Capacitor NiCr Resistor Semi-Insulating GaAs E,D,G MESFET MIM Capacitor NiCr Resistor Figure 18 Modern Ion Implanted GaAs MESFET Process Figure 19 Layout of a Modern I2 GaAs MESFET Process Figure 19 Layout of a Modern I2 GaAs MESFET Process layers of gold interconnect, the upper two being 2um and 4um thick. Inductors and...

Conclusion

Design of systems for very low supply voltage operation requires a holistic approach. The problems encountered in making systems work at IV must be solved on the system-, implementation- and circuit level. On the system level a rearranged AE modulator topology, which uses half delay integrators allows to avoid the addition of extra amplifiers. On the implementation level dedicated circuits are required. A class AB OTA, CMFB and com-parater, which can operate below IF supply, are discussed. It...

Broadband Low Noise Amplifier Design

Based on a topology example of a low-power broadband low-noise amplifier, some aspects of broadband LNA design are illustrated. A prototype, dimensioned in a 0.5 Jim CMOS technology, is described and measured. The schematic of the LNA is shown in figure 1. The amplifier is composed of three cascaded nMOS gain stages Mix, M2x and M3x. The multi-stage topology guarantees a sufficiently high reverse isolation so that the circuit can be used in a low-IF or zero-IF receiver as precisely these...

Subwaf Electronsoft

Schmerbeck, and D.J. Allstot, Simulation Techniques and Solutions for Mixed-Signal Coupling in Integrated Circuits, Kluwer Academic Publishers, 1995. 2 C. Huang, RF Research chases elusive one-chip radio. Op-Ed, EE Times, Issue 959, pp. 45, June 23, 1997. 3 S. Kiaei, D.J. Allstot, K. Hansen and N.K. Verghese, Noise Considerations for Mixed-Signal RF IC Transceivers, ACM Journal on Wireless Networks, Special Issue on VLSI in Wireless Networks, Mar Apr 1998. 4 T.J....

Introduction

The market of RF power amplifiers for mobile communication is presently dominated by GaAs MESFET technology. At the low frequency end (e.g. GSM fo 900MHz) or at low power levels (e.g. DECT PAnt 250mW) Si BJT or MOSFET technology is becoming more important, due to their lower die costs and the possibility for a higher level of integration. For GaAs there are also further drawbacks e.g. the need for a supply switch and the negative gate voltage. Because there is still a drawback in Silicon...

Introduction On Silicon Germanium

In the late eighties the first silicon bipolar RF technologies were maturing to provide about lOGhz fT npn transistors. Several achievements in silicon technology were necessary to make this possible. The poly emitter transistor with the As shallow emitter junction into the implanted base contacted by poly was the motor at that time for the introduction of silicon bipolar technology in the emerging cellular phone applications. 10GHz fT was just enough to serve the basic transceiver functions...

Design Example

The methodology described in this paper has been applied to the verification of the transmit section of a portable radio front end IC. Measured results on the fabricated IC indicated an RF spur (undesired or spurious signal) at the output of an up-conversion mixer (modulator) in the transmit section of the circuit. A 310 MHz carrier signal is divided by two and this drives the quadrature modulator. The modulating signals are at 1 MHz, so the expected modulator output is at 154 MHz or 156 MHz...

Switchedcapacitor filters

Dipartimento di Elettronica - Universita' di Pavia Via Ferrata, 1 -27100 Pavia - Italia Tel. +39 - 382 - 505.22 FAX +39 - 382 - 422.583 E-mail a.baschirotto ele. unipv. it In the last years the interest toward low-power low-voltage integrated systems has consistently grown due to the increasing importance of portable equipment and to the reduction of the supply voltage of modern scaled-down technology IC 1, 2 . In such systems, a number of analog functions can be efficiently implemented with SC...

I

Figure 3 example to illustrate the effect of substrate noise on analog circuits a) current source, realized by a current mirror, with a clean VSSA. b) improvement of the current source of 3a) with VSSA connected to the substrate c) improvement of the current source of 3b) by means of small cascode transistors ture of the CMOS process, the backgate of Ml is coupled to the substrate. For high frequencies the Vgs of the MOST is fixed due to Cgate, and the substrate noise on the backgate directly...

N Jci n Jciis

Jc,i being the transistor collector current densities in clockwise (CW) or counter-clockwise (CCW) direction. A two-quadrant multiplier divider is required to implement the Right-Hand Side (RHS) of Equation (15). Since a class-AB implementation is pursued, this two-quadrant multiplier divider has to be realized by two one-quadrant multiplier dividers. This is realized by splitting the input current into two strictly positive signals I'mi and in2, the difference of which equals Iin. Rewriting...

The Receive Post Mixer Amplifier

To cope with the noise level of the CMOS analog base band signal processor, 16.5 dB gain in the post mixer amplifier is necessary to overcome the 40 dB noise figure of the CMOS circuitry. This brings the total maximum gain of the integrated receiver at 25 dB. The low Rb in the SiGe transistors allows for a low noise preamp in the RF-front-end. A double asymmetrically degenerated differential pair (ADDP) maximizes the linear range of the PMA. Each of the ADDP's provides a maximum flat gain...

Analog Circuit Design

Volt Electronics Mixed-Mode Systems Low-Noise and RF Power Amplifiers for Telecommunication Delft University of Technology, Delft. The Netherlands Eindhoven University of Technology, Eindhoven, The Netherlands Katholieke Universiteil Leuven, Belgium A C.I.P. Catalogue record for this book is available from the Library of Congress. Published by Kluwer Academic Publishers, P.O. Box 17,3300 AA Dordrecht, The Netherlands. Sold and distributed in North, Central and South America by Kluwer Academic...

Acknowledgments

This work was part of the TIBIA II ESPRIT IV project and is extended in the ALPINS ESD-Low-Power project, both in association with Siemens HL. The contribution to these projects described herein this paper is funded by the Swiss Office for Sciences and Education. 1 E. A. Vittoz, Future of Analog in the VLSI Environment, Proc. IEEE Int. Symp. Circuits Syst., pp. 1372-1375, May 1990. 2 E. A. Vittoz, Low-Power Design Ways to Approach the Limits, Proc. IEEE Int. Symp. Circuits Syst., pp. 14-18, May...

Ecole Polytechnique Lausanne Diploma Thesis Brenna

Lee, The Design of CMOS Radio-Frequency Integrated Circuits, Chapter 10, Cambridge University Press, 1998. 2 R. Jindal, Distributed Substrate Resistance Noise in Fine-Line NMOS Field-Effect Transistors, IEEE Trans, on Electron Devices, vol. ED-32, no. 11, Nov. 1985, pp. 2450-2453. 3 D. Shaeffer and T. Lee, A 1.5V, 1.5GHz CMOS Low Noise Amplifier, IEEE J. Solid-State Circuits, vol. 32, no. 5, May, 1997, pp. 745-759. 4 G. Brenna, LNA Research, Diploma Thesis, cole Polytechnique F d rale de...

Dynamic Translinear Circuits

Serdijn, Jan Mulder, Paul Poort, Michiel Kouwenhoven, Arie van Staveren and Arthur H.M. van Roermund Delft University of Technology, Faculty of Information Technology and Systems DIMES Electronics Research Laboratory Mekelweg 4, 2628 CD Delft, The Netherlands phone 31-15-2781715, fax 31-15-2785922, e-mail W.A.Serdijn its.tudelft.nl A promising new approach to shorten the design trajectory of analog integrated circuits without giving up functionality is formed by the class of dynamic...

References

Steyaert, Low-IF Topologies for High Performance Analog Front-Ends of Fully Integrated Receivers, accepted for publication in IEEE Trans, on Circuits and Systems II, 1997 2 J.C.Rudell et al., A 1.9 GHz Wide-Band IF Double Conversion CMOS Receiver for Cordless Telephone Applications, in IEEE J. Solid-State Circuits, vol.32, no. 12, pp.2071-2088, December 1997. 3 J. Crols and M. Steyaert, A 1.5 GHz highly linear CMOS downconversion mixer, in IEEE J. Solid-State Circuits,...

The Quadrature Generator

The quadrature generator is expected to deliver both LO signals with a 90 phase difference accurate to within 1 phase error. This is possible using just an RC and a CR filter to obtain the 45 and -45 phase relation. The phase accuracy is well covered but technology variations are the cause of an important variation of gain. To obtain the necessary gain matching of the I and the Q channel, limiting amplifiers, realized as double differential pairs to obtain a horizontal cascode operation, are...

The Transmitter Topology

The transmitter is basically a zero IF single side band mixer followed by a pre-power amplifier PPA To use the available 2.7 V supply range efficiently, the base band I and Q balanced inputs were realized in current mode. So the only voltage swing on the mixers inputs are the local oscillator LO signals delivered by the quadrature generator QG with 45 45 phase relation. The modulated collector currents of the I and Q mixer enter a resistive summing node to feed a voltage mode RF signal to the...

Substrate Bounce in Mixed Mode Cmos Ics

Philips Research Laboratories, Eindhoven, The Netherlands. Now with University of Twente, Enschede, The Netherlands Substrate noise is one of the key problems in mixed analog digital ICs. Although measures are known to reduce substrate noise, the noise will never be completely eliminated since this requires larger chip area and thus higher cost. Analog circuits on digital ICs simply have to be resistant to substrate noise. A general strategy is given which can be summarized as the supply of the...